1. general description the 74aup2g3407 is a single buffer and a single buffer with open-drain output. it features two input pins (na), an output pin (1y) and an open-drain output pin (2y). schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire v cc range from 0.8 v to 3.6 v. this device ensures a very low static and dynamic power consumption across the entire v cc range from 0.8 v to 3.6 v. this device is fully specified for pa rtial power-down ap plications using i off . the i off circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. features and benefits ? wide supply voltage range from 0.8 v to 3.6 v ? high noise immunity ? complies with jedec standards: ? jesd8-12 (0.8 v to 1.3 v) ? jesd8-11 (0.9 v to 1.65 v) ? jesd8-7 (1.2 v to 1.95 v) ? jesd8-5 (1.8 v to 2.7 v) ? jesd8-b (2.7 v to 3.6 v) ? esd protection: ? hbm jesd22-a114f class 3a exceeds 5000 v ? mm jesd22-a115-a exceeds 200 v ? cdm jesd22-c101e exceeds 1000 v ? low static power consumption; i cc = 0.9 ? a (maximum) ? latch-up performance exceeds 100 ma per jesd 78 class ii ? inputs accept voltages up to 3.6 v ? low noise overshoot and undershoot < 10 % of v cc ? i off circuitry provides partial power-down mode operation ? multiple package options ? specified from ? 40 ? cto+85 ? c and ? 40 ? cto+125 ? c 74aup2g3407 low-power single buffer; single buffer with open-drain rev. 1 ? 18 october 2013 product data sheet
74aup2g3407 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 18 october 2013 2 of 19 nxp semiconductors 74aup2g3407 low-power single buffer; si ngle buffer with open-drain 3. ordering information 4. marking [1] the pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. functional diagram table 1. ordering information type number package temperature range name description version 74aup2g3407gw ? 40 ? c to +125 ? c sc-88 plastic surface-mounted package; 6 leads sot363 74aup2g3407gm ? 40 ? c to +125 ? c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 ? 1.45 ? 0.5 mm sot886 74AUP2G3407GF ? 40 ? c to +125 ? c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 ? 1 ? 0.5 mm sot891 74aup2g3407gn ? 40 ? c to +125 ? c xson6 extremely thin small outline package; no leads; 6 terminals; body 0.9 ? 1.0 ? 0.35 mm sot1115 74aup2g3407gs ? 40 ? c to +125 ? c xson6 extremely thin small outline package; no leads; 6 terminals; body 1.0 ? 1.0 ? 0.35 mm sot1202 table 2. marking type number marking code [1] 74aup2g3407gw aj 74aup2g3407gm aj 74AUP2G3407GF aj 74aup2g3407gn aj 74aup2g3407gs aj fig 1. logic symbol fig 2. iec logic symbol fig 3. logic diagram $ $ < < d d d d d d < $ < $ d d d < < * 1 ' $ $
74aup2g3407 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 18 october 2013 3 of 19 nxp semiconductors 74aup2g3407 low-power single buffer; si ngle buffer with open-drain 6. pinning information 6.1 pinning 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level. [1] h = high voltage level; l = low voltage level; z = high-impedance off state. fig 4. pin configuration sot363 fig 5. pin config uration sot886 fig 6. pin configuration sot891, sot1115 and sot1202 $ 8 3 * $ < * 1 ' $ < d d d 9 & |